ST公司的SPC560Sx(SPC560S50x, SPC560S60x)是采用Power Architecture架构的32位MCU,采用高性能的64MHz e200z0h CPU,高达60MIPS性能,片内有高达1MB 的闪存,48KB的RAM,160KB的图像RAM. SPC560Sx还具有众多的仪表盘接口如6个步进马达驱动器,4x40或6x38多或少LCD显示器驱动器,声控以及实时时钟和TFT显示控制单元等.本文介绍了SPC560Sx的主要特性,方框图以及采用SPC560S60的仪表盘方框图和采用SPC560Sx的仪表盘方框图.
SPC560S50x, SPC560S60x 32-bit MCU for cluster applications with stepper motor,
TFT graphic controller and LCD driver
The SPC560Sx family represents a new generation of 32-bit microcontrollers based on the ower ArchitectureTM. These devices are targeted to address the next wave of automotive instrument cluster applications driven by significant growth in demand for color Thin Film Transistor (TFT) displays within the vehicle. The advanced and cost-efficient processor core of the family complies with the Power Architecture™ embedded category, which is 100% user-mode compatible with the original PowerPC user instruction set architecture (UISA). It offers high performance processing optimized for low power consumption, operating at speeds up to 64 MHz. The family itself is fully scalable from 256 KB up to 1 MB internal flash memory. The memory capacity can be further expanded via the on-chip QuadSPI serial flash controller module. Larger memory versions with greater graphics functionality are planned for the future.
The SPC560Sx family benefits from the extensive development infrastructure for Power
Architecture devices which is already well established. This includes full support from
available software drivers, operating systems and configuration code to assist with users
The SPC560Sx family platform has a single level of memory hierarchy supporting on-chip
SRAM and flash memories. The 1 MB flash version (SPC560S60) features 160 KB of onchip graphics SRAM to buffer cost effective color TFT displays driven via the on-chip
Display Control Unit (DCU).
The SPC560Sx family of microcontrollers are designed to reduce development and
production costs of TFT-based instrument cluster displays by providing a single-chip solution with the processing and storage capacity to host and execute real-time application software and drive the TFT display directly. Operating at speeds of up to 64 MHz, these devices offer high performance processing with low power consumption. Memory and storage capacity can be further expanded via the on-chip Serial Peripheral Interface (SPI) and QuadSPI peripheral modules.
The SPC560Sx platform features up to 1 MB of on-chip flash memory, up to 160 KB of onchip graphics SRAM and an on-chip Display Control Unit (DCU) designed to drive color TFT displays.
SPC560Sx devices are compatible with the existing development infrastructure of current
Power Architecture™ devices and are supported with software drivers, operating systems
and configuration code to assist with application development.
■High performance 64 MHz e200z0h CPU
–32-bit Power Architecture™ book E CPU
–Up to 60 MIPs operation
–Variable length encoding (VLE)
–Up to 1 Mbyte on-chip Flash, with ECC
–Up to 48 Kbytes on-chip RAM with ECC
–160 Kbytes on-chip graphic RAM
–External flash entension via Quad-SPI
–12-entry memory protection unit
■Dashboard peripheral set
–6 stepper motor drivers with stall detection and zero positioning
–4 x 40 or 6 x 38 LCD display driver
■TFT display control unit
–4 x plane and cursor graphic controller
–Display capable of driving up to WVGA
–Proprietary display input
■Interrupts and DMA
–Up to 128 selectable interrupts
–16 priority levels
–Nonmaskable interrupt (NMI)
–Up to 32 external interrupts with 18 wakeup lines
–16-channel eDMA controller
■Up to 136 GPIOS in LQFP176
–4-channel 32-bit periodic interrupt timers
–4-channel 32-bit system timer module
–Software watchdog timer
–8-channel 16-bit counter IC/OC
–16-channel 16-bit counter IC/OC/PWM
–2 FlexCAN interfaces (2.0B active)
–Up to 3 LINFlex/UART channels
–Up to 3 DSPI channels, with one Quad-SPI
–Up to 4 I2C interfaces
■16/23-channel,10-bit ADC converter
■On-chip CAN/UART bootstrap loader
–4 to 16 MHz main oscillator
–32 kHz auxiliary oscillator
–16 MHz internal RC oscillator
–128 kHz internal RC oscillator for low power modes
–Up to 2 software-controlled internal FMPLL modulated or not
■Exhaustive debugging capability
–Nexus L1 on all devices
–Nexus L2+ on LFBGA208 package
–Single 5 V or 3.3 V supply for I/Os and ADC
–On-chip voltage regulator with external ballast transistor
■144 LQFP, 176 LQFP packages
■Operating temperature range -40 to 105 °C
Figure 2 outlines an Instrument Cluster application supporting a color TFT display built around the SPC560S60 microcontroller. With its internal Display Control Unit, it is capable of directly driving up to a Wide Quarter VGA (WQVGA) color TFT display using internal memory resources only. Further, it supports a Parallel Digital Interface (PDI) for cost effective, simple video input. Increased graphical content can be achieved using external serial flash memory and can be further extended with external flash and/or SRAM connected to the serial peripheral interface (QuadSPI).
Instrument Cluster with LCD Segment Display
Figure 3 outlines an instrument cluster application supporting a monochrome dot matrix
display built around the SPC560Sx microcontroller.